BHI - Branch on HIgher than The destination operand will be added to the PC, and the 68k will continue reading at the new offset held in PC, if the C and Z flags are both clear. Otherwise, the instruction is ignored. Examples This instruction uses the C and Z flags together to detect if the result is higher than: cmpi.w #$0020,d0 bhi.s IsHigher Emory University 00000014 test2: BHI test3 // Branch if R0 > 1 (unsigned) 00000018 SUB R1,R1,0x01000 // Did not branch: Turn off HI flag Click here to open a browser for the ARM instruction simulator with pre-loaded code. 1. Disassembly In the " " window, click in the grey area left of the ADD instruction. The red dot Conditional Branch Instructions There are 16 possible conditional branches in the ARM assembly language, including "always" (which is effectively an unconditional branch) and "never" (which is never used but exists for future possible extensions to the architecture). The complete set of branch instructions is given in the table: This is part two of the ARM Assembly Basics tutorial series, covering data types and registers. Similar to high level languages, ARM supports operations on different datatypes. The data types we can load (or store) can be signed and unsigned words, halfwords, or bytes. The extensions for these data types are: -h or -sh for halfwords, -b or -sb 2. The exact answer will depend on which microcontroller you are using. In general, if there are no operands, BEQ would be expected to branch if the Accumulator is 0. This is most likely on simple micros where the Accumulator is the primary register for calculations. It looks, as if "signed int - unsigned int" is handled as "unsigned int", also compare between "signed int" and "unsigned int" is handled like compare between two "unsigned int". This preferential usage of "unsigned int" is really hard to understand. The C standard requires exactly that; any compiler that did differently would be wrong. If the left and right hand side of the addition are R1 and R2 respectively, and the result is to go in R0, the operand part would be written R0,R1,R2. Thus the complete add instruction, in assembler format, would be: ADD R0, R1, R2 ;R0 = R1 + R2 Most ARM mnemonics consist of three letters, e.g. SUB, MOV, STR, STM. ARM DDI 0084D ARM Instruction Set This chapter describes the ARM instruction set. 4.1 Instruction Set Summary 4-2 4.2 The Condition Field 4-5 4.3 Branch and Exchange (BX) 4-6 4.4 Branch and Branch with Link (B, BL) 4-8 4.5 Data Processing 4-10 4.6 PSR Transfer (MRS, MSR) 4-17 4.7 Multiply and Multiply-Accumulate (MUL, MLA) 4-22