cache memory pptinstruction cache example

Break program into n instructions blocks, compress each block serially at byte level. Problems 8 byte instruction 8 cycle to decompress a single instruction. Filtering unused words allows cache to store more cache lines Background; Line Distillation; Experimental Evaluation; Interaction with CompressionBackground; Compressed Cache Design; Adaptive Compression L1 prefetching hides part of decompression overhead; Link compression reduces increased Data Compression Techniques for Cache and Main Memory SPARSH MITTAL IIT HYDERABAD, INDIA Motivation Applications are becoming more data-intensive Introduction • We want to prove that a processor's instruction code can be compressed after compilation, and decompressed real time during a processor's fetch Background on Cache Compression. Key requirements: Fast (low decompression latency); Simple (avoid complex hardware changes); Effective (good compression